The physical layer of the UTRA FDD system is simultaneously sophisticated in its use of advanced communications techniques and complex in its wide range of operating modes. Therefore, having the necessary tools to understand its operation and to test your implementation is critical to a successful design. One valuable component of this tool kit is the UTRA FDD Blockset from MAC Ltd.
The UTRA FDD Blockset is a verified and highly configurable reference model conforming to the Release 4 and Release 5 3GPP specifications. The UTRA FDD Blockset enables an engineer to rapidly assemble transmitter channel models and therefore concentrate on the development of proprietary receivers, and in doing so provides a quick and easy way of becoming familiar with the specifications. The UTRA FDD Blockset is supplied as two separate libraries: the first supporting UTRA FDD Release 4 and the second supporting Release 5. The Release 4 library can be purchased standalone but is a pre-requisite for the Release 5 library.
Functions of the UTRA FDD Release 4 Blockset
The UTRA FDD Release 4 Blockset provides basic Simulink blocks and composite channel models for all uplink and downlink channels described in the 3GPP UTRA FDD Release 4 specification. These include the downlink channels DPDCH/DPCCH, P-CCPCH, S-CCPCH, P-CPICH, S-CPICH, SC, PDSCH, AICH, AP-AICH, CD/CA-ICH, PICH and CSICH. Uplink channel support consists of the PRACH, PCPCH, DPDCH and the DPCCH. All of these channels are based on the 10 ms/15 timeslot channels described in the Release 99 and Release 4 specifications.
Functions of the UTRA FDD Release 5 Blockset
The UTRA FDD Release 5 Blockset is an optional extension of the UTRA FDD Release 4 Blockset that adds support for the High Speed Downlink Packet Access (HSDPA) channels. To support HSDPA, two downlink channels are introduced, namely the High-Speed Shared Control Channel (HS-SCCH) and the High-Speed Downlink Shared Channel (HS-DSCH), consisting of one or more High-Speed Physical Downlink Shared Channels (HS-PDSCHs). For the uplink, there is only one channel, namely the High-Speed Dedicated Physical Control Channel (HS-DPCCH). These blocks have been designed to be compliant with the HSDPA channels described in the Release 5 UTRA FDD-mode specifications and to incorporate hybrid-automatic repeat request (H-ARQ), QPSK and 16QAM modulation, a 2 ms transmission time interval, open loop transmit diversity and timing offsets between physical channels.
The benefits of the UTRA FDD Blockset
- The UTRA FDD Blockset provides an invaluable educational tool to aid in familiarisation with the UTRA FDD specifications
- It provides a fast way of building transmitter models for all UTRA FDD channels for both downlink and uplink
- The Simulink blocks in the UTRA FDD Blockset have been extensively verified, so they can provide a reliable reference against which proprietary transmitter and receiver designs can be tested
- The UTRA FDD blocks can be used with blocks from other Simulink libraries, such as the DSP and Communications blocksets, so that more complex, proprietary models can be realised
What is included?
- Each library is designed using a hierarchical approach - blocks in a sub-library are created using blocks from a lower-level sub-library
- HTML on-line documentation - every block within a library has its own help page associated with it
- Each library has a set of demonstration models
- Every block in the library is configurable using parameters or dynamic inputs. Only parameters that are fixed within the specifications are fixed within the models
- Simulation models can have their respective inputs driven by from a CSV file
Requirements
- MATLAB® Release 2006 or later
- Simulink®
- Signal Processing Toolbox
- DSP Blockset
Purchasing Information
For a quote or more information on the UTRA FDD Blockset please email enquiries@macltd.com.
Product Datasheet
Further details about the UTRA FDD Blockset libraries may be obtained by downloading the UTRA FDD Blockset 4 and UTRA FDD Blockset 5 datasheets.